K 10
svn:author
V 6
dillon
K 8
svn:date
V 27
2002-01-06T04:58:08.000000Z
K 7
svn:log
V 501
MFC 1.354 - lower FIFO threshold to MEDH to increase the amount of interrupt
slop we can survive from 174uS to 694uS (@115200 bps).  This appears to
solve silo overflow errors for a number of people.  Such errors can occur
due to video cards hogging memory bandwidth as well as inefficiencies in
the kernel (interrupts left disabled for too long a period of time).
Modern cpu's can easily handle the increased serial interrupt rate
(1440 hz instead of 822 hz @ 115200 bps).

Approved by:	re, bde, imp

END