K 10
svn:author
V 5
peter
K 8
svn:date
V 27
2002-01-16T00:44:29.000000Z
K 7
svn:log
V 256
Ensure that we set all the %cr0 bits to a known state for the AP's before
they make it through to userland.  This should fix the p5-smp problem
without affecting the other cpus (eg: cyrix, see initcpu.c and the special
cache handling for these cpu types).

END