DELTA 278770 0 196
SVN ¢V¥yƒ' Œ? € –Œ?€‚ƒ% =
{
	/* Use safe defaults for start */
	.dcache_line_size = 32,
	.dcache_line_mask = 31,
	.icache_line_size = 32,
	.icache_line_mask = 31,
}
	/* L1 Cache sizes */
	cpuinfo.dcache_line_size = 1 << (CPU_CT_DMINLINE(cpuinfo.ctr ) + 2);
	cpuinfo.dcache_line_mask = cpuinfo.dcache_line_size - 1;
	cpuinfo.icache_line_size= 1 << (CPU_CT_IMINLINE(cpuinfo.ctr ) + 2);
	cpuinfo.icache_line_mask = cpuinfo.icache_line_size - 1;
}
ENDREP
DELTA 276395 0 35
SVN ­1¯c‚ ŽF ‡ ŸŽ0€‚‚cpuinfo
ASSYM(DCACHE_LINE_SIZE, offsetof(struct cpuinfo, dcache_line_size));
ASSYM(DCACHE_LINE_MASK, offsetof(struct cpuinfo, dcache_line_mask));
ASSYM(ICACHE_LINE_SIZE, offsetof(struct cpuinfo, icache_line_size));
ASSYM(ICACHE_LINE_MASK, offsetof(struct cpuinfo, icache_line_mask));
ENDREP
DELTA 277415 0 284
SVN Õ×>ƒ8= Œb €v ·FŒ`˜ ƒÄ6€ ]Ç˜ ‚NÉ˜ Ëd˜ vÍ	˜ ‚EÏ˜ -Ñd˜ uÓ!ƒ6vm_offset_t dcache_wb_pou_checked(vm_offset_t, vm_size_t);
vm_offset_t icache_inv_pou_checked(vm_offset_t, vm_size_t);cpuinfo.dcache_line_sizeInvalidate branch predictor buffer */
static __inline void
bpb_inv_all(void)
{
#if __ARM_ARCH >= 7 && defined SMP
	_CP15_BPIALLIS();
#else
	_CP15_BPIALLcpuinfo.dcache_line_sizecpuinfo.dcache_line_sizecpuinfo.dcache_line_sizecpuinfo.dcache_line_sizecpuinfo.dcache_line_sizecpuinfo.dcache_line_sizeENDREP
DELTA 276333 3633 1193
SVN “I”;q
 ’j €p a’hp
	/* L1 cache info */
	int dcache_line_size;
	int dcache_line_mask;
	int icache_line_size;
	int icache_line_maskENDREP
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END
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amd64
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arm
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