DELTA 256487 0 68 SVNklFUX(qj(ar71xx_flush_ddr_id_t id) { switch (id) { case AR71XX_CPU_DDR_FLUSH_GE0: ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE0); break; case AR71XX_CPU_DDR_FLUSH_GE1: ar71xx_ddr_flush(AR71XX_WB_FLUSH_GE1); break; case AR71XX_CPU_DDR_FLUSH_USB: ar71xx_ddr_flush(AR71XX_WB_FLUSH_USB); break; case AR71XX_CPU_DDR_FLUSH_PCIE: ar71xx_ddr_flush(AR71XX_WB_FLUSH_PCI); break; default: printf("%s: invalid DDR flush id (%d)\n", __func__, id); break; }get_eth_pll, &ar71xx_chip_ddr_flushENDREP DELTA 276610 0 272 SVN$P#o 8]FZx`:Ntypedef enum { AR71XX_CPU_DDR_FLUSH_GE0, AR71XX_CPU_DDR_FLUSH_GE1, AR71XX_CPU_DDR_FLUSH_USB, AR71XX_CPU_DDR_FLUSH_PCIE, AR71XX_CPU_DDR_FLUSH_WMAC, AR71XX_CPU_DDR_FLUSH_PCIE_EP, AR71XX_CPU_DDR_FLUSH_CHECKSUM, } ar71xx_flush_ddr_id_t;) (ar71xx_flush_ddr_id_t (ar71xx_flush_ddr_id_t id) { ar71xx_cpu_ops->ar71xx_chip_ddr_flush(idENDREP DELTA 279511 0 37 SVN3 vNSU**8dreg.h> /* for stuff in ar71xx_cpudef.h */ #include /* for stuff in ar71xx_cpudef.h */ #include q3N',uV(A%Ђ=SJ?e LI[ q6v;\lrL ?vta.q0wH;FQO6~g]ܓ]_?B Q-`@G 7}Pzbb]GZF됒7SVQ~m ENDREP DELTA 256490 0 1285 SVN(eJ^d1OYx^M0s+%,dT+HlC)iiYpH=00I4QJ%/ldü?.\w 2㵶PU، Tõඡw w,> fu"kwzgiQK}J>qg4| ]țENDREP DELTA 276610 298 451 SVN <oJ7Y1>N[x^AK0s)I =X۩vu ؃Mj4w7)"^7dТ@ JDH)>[` GJj>HHURUKn {,/הo;꺚"ߝhW#o66uq pׁSþ Q[/Fua}pi9wv`Ktc~j'zoҢ-Zǔ\p֘nU^ ,SENDREP DELTA 280798 1833 823 SVN/p#/{ $! * XXX this needs to be done at interrupt time! Grr! */ static void arge_flush_ddr(struct arge_softc *sc) { switch (sc->arge_mac_unit) { case 0: ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_GE0); break; case 1: ar71xx_device_flush_ddr(AR71XX_CPU_DDR_FLUSH_GE1); break; default: device_printf(sc->arge_dev, "%s: unknown unit (%d)\n", __func__, sc->arge_mac_unit); break; } arge_flush_ddrENDREP DELTA 285073 0 55 SVN %"d6IDE x^AK0s)`BVTjKCmw)Ec_y[@ D 0FԼ&t&'8K(&9v)?#t֌33nWb.x픿u%Nnhٝ;ՖnBb1-e3ĉ!Y~to袬ؠ!N6~CdŔdk@54 0[