K 10
svn:author
V 9
alepulver
K 8
svn:date
V 27
2006-11-05T20:51:06.000000Z
K 7
svn:log
V 308
The goals of the FreeHDL project are to develop a VHDL simulator that has
a graphical waveform viewer and a source level debugger. It also aims at
VHDL-93 compliancy. The project is at a very early development stage.

WWW: http://www.freehdl.seul.org/

PR:		ports/104634
Submitted by:	lon_kamikaze at gmx.de

END