K 10 svn:author V 4 manu K 8 svn:date V 27 2019-06-26T14:23:46.059290Z K 7 svn:log V 180 devel/trellis: Add new port Project trellis document the bitstream for Lattice ECP5 FPGAs. Used with yosys and nextpnr it can create a full bitstream with only open source tools. END